Cypress Semiconductor /psoc63 /I2S0 /TR_CTL

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Interpret as TR_CTL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TX_REQ_EN)TX_REQ_EN 0 (RX_REQ_EN)RX_REQ_EN

Description

Trigger control

Fields

TX_REQ_EN

Trigger output (‘tr_i2s_tx_req’) enable for requests of DMA transfer in transmission ‘0’: Disabled. ‘1’: Enabled.

RX_REQ_EN

Trigger output (‘tr_i2s_rx_req’) enable for requests of DMA transfer in reception ‘0’: Disabled. ‘1’: Enabled.

Links

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